Metrics and Methodology for Hardware Security Constructs

Despite hardware’s reputation for being secure, this NIST paper reveals how flaws introduced during design or manufacturing can lead to serious vulnerabilities. It introduces a scalable methodology for mapping hardware weaknesses to attack patterns using CAPEC and CWE classifications, quantifying both the threat and sensitivity of vulnerabilities. These metrics help prioritize which weaknesses to address based on how easily they can be exploited and how many types of attacks they enable. The framework is designed to evolve as new threats emerge, aiming to support more secure hardware design in the future.